13. The RS flip-flop¶
So far we have studied combinational circuits. In this type of circuits, the signal outputs depend exclusively on the inputs, without any internal memory effect.
From now on, we will study some sequential circuits, which differ from combinational ones in that their outputs depend not only on the inputs, but also on the internal state of the circuit, which has memory.
The first sequential circuit that we are going to study is the RS flip-flop. This flip-flop is used to store a bit of information (a zero or a one), functioning as the most basic memory circuit we can use. It is the fundamental component of sequential circuits such as counters and registers and is the basis of SRAM memory in computers.
The RS flip-flop has two inputs: the S or SET input that memorizes a one (high state), and the R or RESET input that memorizes a zero (low state).
The RS flip-flop has two outputs: the Q output reflects the internal state of the flip-flop and the negated output /Q will have the opposite value of the Q output.
Simulation¶
In the following simulation, we can observe an RS flip-flop manufactured with two NOR gates:
Truth table¶
The truth table of the RS flip-flop manufactured with NOR gates is the following:
| Yes | R | Q | /Q |
|---|---|---|---|
| 0 | 0 | Q | /Q |
| 1 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 |
When the SET input is activated, the flip-flop is activated and the Q output will have a high value (logical 1). Once the SET input is deactivated, the flip-flop continues to maintain its active state until it receives an opposite input, RESET.
When the RESET input is activated, the flip-flop is deactivated and the Q output will have a low value (logical 0). Once the RESET input is deactivated, the flip-flop continues to maintain its inactive state until it receives an opposite input, SET.
The last state, when the SET and RESET inputs are activated simultaneously, is called prohibited state or indeterminate state because it forces both outputs low (logical zero). In this state, the flip-flop outputs behave illogically, since the SET and RESET signals are directly opposed to each other.
Flip-flop RS NAND¶
In the following simulation, we can see an RS flip-flop made with two NAND gates:
The inputs will be active at a low level (a zero activates the input and a one is equal to the input at rest).
Exercises¶
What two types of digital circuits exist? How are they different from each other?
What type of digital circuit is an RS flip-flop and what is it for?
How many inputs does an RS flip-flop have and what function does each one perform?
How many outputs does an RS flip-flop have and what function does each one fulfill?
Draw the circuit of an RS flip-flop with NOR gates.
The SET input must be 1 and the RESET input must be zero. Draw the correct values of the Q and /Q outputs.
Draw the truth table of an RS flip-flop and briefly explain its normal operation.
What is the name of the state in which both inputs are high and why is it called that?
Helping you with the last simulation, draw the truth table of the RS flip-flop made with NAND gates.
Indicate the prohibited or undetermined status in the table. What are his two outputs worth in that state?